연락처 : 031-400-5168
학부: 전자회로, 집적회로
대학원: 고급아날로그설계, 혼성신호회로설계
아날로그회로설계, Power Management 회로 설계, 델타-시그마 데이터 변환기.
1990년도 한양대학교 전기공학과 공학사
1998년도 (미) Penn State Univ. 전자공학과 공학석사
2001년도 (미) Univ. of Texas at Austin 전자공학과 공학박사
2001 ~ 현재 : 한양대학교 교수
2000 ~ 2001 : 인텔 Senior Design Engineer
1990 ~ 1996 : 삼성전자 선임연구원
IEEE Senior Member
Asian Solid-State Circuit Conference TPC Member
IEEE SSCS Seoul Chapter Committee
IEEK Life Member
H. Nam, Y. Ahn, and J. Roh, "5-V buck converter using 3.3-V standard CMOS process with adaptive power transistor driver increasing efficiency and maximum load
capacity", IEEE Transactions on Power Electronics, vol. 27, no. 10, pp. 4347-4356, Oct. 2012
H. Nam, Y. Ahn, and J. Roh, "A Buck Converter with Adaptive On-Time PFM Control and Adjustable Output Voltage," Analog Integrated Circuits and Signal Processing.
vol. 71, pp. 327-332, May. 2012.
Y. Choi, W. Tak, Y. Yoon, J. Roh, S. Kwon, and J. Koh, " A 0.018% THD+N, 88dB PSRR PWM Class-D Amplifier for Direct Battery Hookup," IEEE Journal of Solid-State
Circuits. vol. 47, no. 2, pp. 454-463, Feb. 2012.
Y. Choi, H. Roh, and J. Roh," A Buffless Interface for Single-ended ECM Sensors," IEEE Trans. Instrumentation and Measurement. vol. 61, no. 2, pp. 513-520, Feb. 2012.
Y. Ahn, D. Heo, H. Nam, and J. Roh, "A 400-mA Current-Mode Buck Converter with Self-Trimming Current Sensing Scheme", Analog Integrated Circuits and Signal
Processing, Sep. 2010.
H. Roh, Y. Choi, and J. Roh, "A 89-dB DR 457-uW 20kHz bandwidth delta-sigma modulator with gain-boosting OTAs", Analog Integrated Circuits and Signal Processing,
vol. 64, pp. 173-182, Aug 2010.
H. Roh, S. Byun, Y. Choi, and J. Roh, "Fully synthesized decimation filter for delta-sigma A/D converters", International Journal of Electronics, vol. 97, No. 6, pp. 663-676,
H. Roh, H. Lee, Y. Choi, and J. Roh, "A 0.8-V 816-nW Delta-Sigma Modulator for Low-Power Biomedical Applications", Analog Integrated Circuits and Signal Processing,
vol. 63, pp. 101-106, Apr. 2010.
H. Nam, I. Kim, Y. Ahn, and J. Roh, "DC-DC Switching Converter with Positive and Negative Outputs for active-matrix LCD Bias", IET Circuits Devices Systems., Mar. 2010.
H. Roh, H. Kim, Y. Choi, J. Roh, Y. Kim, and J. Kwon, "A 0.6-V Delta-Sigma Modulator with Subthreshold-Leakage Suppression Switches", IEEE Trans. on Circuits and
System-II, Nov. 2009.
Y. Choi, J. Roh, H. Roh, H. Nam, S. Lee, "A 99-dB DR Fourth-Order Delta-Sigma Modulator for 20-kHz Bandwidth Sensor Applications", IEEE Trans. Instrumentation and
Measurement., vol. 58, no. 7, pp. 2264-2274, July 2009.
J. Roh, et. al., "Class-D audio amplifier using 1-bit fourth-order delta-sigma modulation," IEEE Transactions on Circuits and Systems II, vol. 55, pp. 728-732, Aug. 2008.